Principal Product Applications Engineer

San Jose · USD 207,000-230,000 · 8-12 years experience · Posted Sep 29, 2026

At a glance

The Principal Product Applications Engineer will lead technical engagements to deploy high-performance PCIe fabric solutions for rack-scale AI infrastructure. This role involves translating complex system requirements into architectures, leading platform bring-up, and guiding the integration of Scorpio switches across diverse hardware ecosystems. You will bridge product strategy, firmware, and real-world system behavior to solve interoperability challenges.

Lead technical engagements with customers and ecosystem partners to define Scorpio-based PCIe architectures and deployment requirements.
Develop reference designs, application guidance, technical presentations, and system-level collateral.
Translate customer use cases into clear product requirements, integration plans, and prioritized technical actions.
Drive system bring-up, debug, and interoperability across PCIe hosts, GPUs, NICs, storage devices, and high-performance endpoints.
Partner with firmware teams to define, implement, and validate device configuration, boot flows, telemetry, and recovery mechanisms.
Analyze link training, enumeration, performance, error handling, and system stability using protocol traces and lab instrumentation.
Build and maintain firmware, validation, and automation workflows to improve debug efficiency.
Partner with architecture, design, and validation teams to resolve complex issues from prototype through production.
Lead root-cause analysis and communicate risks and recommendations to drive issues to closure.
Influence product enhancements and ecosystem interoperability plans for next-generation AI infrastructure.

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
8–12 years of experience in product applications, systems engineering, firmware, platform validation, or a related semiconductor domain.
Strong understanding of PCIe architecture, including link training, enumeration, configuration space, error handling, and system interoperability.
Experience with firmware development or debug, including reading code and interpreting logs.
Hands-on experience with system bring-up, lab debug, protocol analysis, and root-cause investigation.
Strong written and verbal communication skills.

Experience with PCIe Gen 6 or Gen 7, PCIe fabric switches, retimers, or other high-speed connectivity products.
Familiarity with UALink, UCIe, or emerging scale-up and scale-out interconnect architectures.
Experience developing validation plans, firmware test strategies, or lab automation.
Background supporting AI servers, accelerator platforms, hyperscale infrastructure, or high-performance computing systems.
Demonstrated ability to lead ambiguous, cross-functional technical challenges in a fast-paced environment.