Mixed Signal IC Layout Engineer

Santa Clara · Remote · USD 100,000-500,000 · 10+ years experience · Remote · Posted Sep 28, 2026

At a glance

The Mixed Signal IC Layout Design Engineer role involves full-custom physical layout of analog and mixed-signal integrated circuits.
This position turns schematics into manufacturable layouts that meet performance, power, area, and reliability targets in advanced FinFET processes.
The role focuses on high quality, high-speed analog/mixed-signal blocks and their integration into larger SoCs.

Execute full-custom analog/mixed-signal layout for key blocks from schematics to manufacturable layouts.
Develop optimized block and top-level floorplans, placement, and routing that balance area, parasitics, matching, congestion, and integration into our D2D PHY.
Apply best-known layout practices and optimize parasitics (R/C), coupling, IR drop, and electromigration to meet precision, noise, timing, and power goals while closing DRC, LVS, ERC, DFM, and Antenna.
Support post-layout extraction and simulation.

An experienced analog/mixed-signal IC layout engineer with strong full-custom layout background on high-speed blocks.
Proficient with Synopsys Custom Compiler or Cadence Virtuoso for custom layout, and Synopsys ICV or Siemens Calibre for physical verification.
Deep experience in CMOS/FinFET nodes with delivered silicon and a strong grasp of EM/IR, ESD, and latch-up in mixed-signal layouts.
Detail-oriented and organized, able to own complex blocks independently and collaborate effectively with circuit designers.
Typically hold a BSEE (or equivalent experience) with ~10+ years in analog/mixed-signal layout.

Contribute layout methodology and automation/scripts to improve team-wide quality and productivity.