Post-Silicon Lab Manager

Santa Clara · USD 100,000-500,000 · 3+ years experience · Hybrid · Posted Sep 28, 2026

At a glance

To support our next-generation, high-performance RISC-V CPU architectures and advanced chiplet solutions, Tenstorrent is looking for a hands-on, experienced Post-Silicon Lab Manager.
In this role, you will own the post-silicon lab infrastructure and manage operational workflows supporting bring-up, system validation, and customer enablement.

Direct post silicon validation engineers on cost building cost effective validation and debug infrastructure.
Run day-to-day lab operations for CPU post-silicon validation, power/performance assessment, and debug, with lab infrastructure aligned to tape-out and bring-up schedules.
Lead the lab environment for first-silicon power-on, system bring-up, and platform validation, including board-level fixes to salvage eval boards or meet new validation needs.
Deploy and maintain server racks, data acquisition, power telemetry rigs, and automated test benches for multi-core CPU and chiplet-based systems.
Manage the CapEx budget for scopes, logic/protocol analyzers, and traffic generators.
Own inventory, calibration cycles, silicon allocation tracking, and lab safety compliance using JIRA, Confluence, and lab scheduling tools.

Hold a B.S. or M.S. in Electrical Engineering, Computer Engineering, or a similar technical field.
Have 8–12+ years in semiconductor hardware, including 3+ years leading a post-silicon validation, characterization, or hardware lab team focused on CPUs.
Know high-speed interfaces (PCIe, DDR/GDDR/HBM, SerDes) and fabric links in depth, and you're hands-on with board-level debug tools.
Bring a startup mindset, staying calm and quick when troubleshooting physical hardware under tight tape-out and silicon-arrival deadlines.
Communicate clearly across functions and keep remote, multi-site teams aligned from the Santa Clara hub.