Principal Signal Integrity Engineer, Satellites (Starlink)
Redmond, WA · USD 190,000-290,000 · 5+ years experience · Posted Oct 6, 2026
At a glance
- Experience
- 5+ years experience
- Location
- Redmond, WA
- Salary
- USD 190,000-290,000 · Base salary
About the role
- The Principal Signal Integrity Engineer will own signal integrity throughout the entire life-cycle of Starlink satellite hardware.
- This role sits at the intersection of electrical, mechanical, thermal, software, and antenna/RF engineering to enable advanced broadband connectivity.
- The engineer will define design, analysis, and verification processes for the Starlink program.
Responsibilities
- Specify, design, simulate, verify, qualify, and troubleshoot SI aspects of advanced satellite hardware.
- Work with wireline and electro-optical communication systems including SERDES, DSPs, retimers, and optoelectronics.
- Manage high-speed and high-bandwidth memory interfaces such as DDR4, LPDDR5, GPDDR6, QSPI NOR, and eMMC.
- Collaborate with cross-functional teams to architect products using novel channels, interfaces, and power delivery strategies.
- Derive top-level specifications for PCB materials and channel subcomponents.
- Design and optimize transition structures from die bump to die bump.
- Root cause and fix issues found in PCB manufacturing, PCBA test, or satellite integration.
- Define best practices, simulation workflows, test methodologies, and signoff criteria for SI needs.
Requirements
- Bachelor’s degree in electrical engineering, computer engineering, or physics.
- 5+ years of industry experience designing circuits, electronic products, or hardware.
- 5+ years of experience using 3D EM simulation tools and high-speed digital channel simulators (CST, HFSS, ADS).
- 5+ years of research or industry experience with high-speed digital design.
- Must be a U.S. citizen, lawful permanent resident, refugee, or asylee to conform to U.S. Government export regulations.
Preferred qualifications
- Master’s degree or PhD in electrical engineering or computer engineering with emphasis in electromagnetic theory, transmission line theory, or wireline transceivers.
- Experience designing hardware from concept through production.
- Experience architecting, implementing, and debugging DSP-based SERDES products (56Gbps, 112Gbps, 224Gbps).
- Understanding of wireline transceiver concepts, architectures, and circuits.
- Proficiency in Python, C, or C++.
- Experience with low loss laminates, high volume PCB manufacturing, and high-speed connectors.
- Experience debugging and resolving EMI/EMC de-sense problems.
Benefits
- Medical, vision, and dental coverage
- 401(k) retirement plan
- Short and long-term disability insurance
- Life insurance
- Paid parental leave
- 3 weeks of paid vacation
- 10 or more paid holidays per year
- Employee Stock Purchase Plan
- Long-term incentives (stock or cash awards)
- Discretionary bonuses
Workplace
- Some travel may occasionally be required.
- Company shuttles offered from select Seattle locations to the Redmond office.
Skills
- CST
- HFSS
- ADS
- SERDES
- DSPs
- DDR4
- LPDDR5
- GPDDR6
- Python
- C
- C++
- EMI/EMC
