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Senior Principal Test Engineer

Astera Labs

San Jose · 12-20 years experience · Posted Oct 1, 2026

At a glance

Experience
12-20 years experience
Location
San Jose

About the role

  • The Senior Principal Test Engineer serves as a technical authority for test engineering across complex mixed-signal silicon and high-speed connectivity products.
  • This role involves defining test strategies for SCM high-volume manufacturing and validation boards, owning execution from early product engagement through mass production.

Responsibilities

  • Define and own comprehensive test strategies, specifications, and plans from product definition through high-volume production.
  • Establish coverage, quality, yield, test-time, and cost objectives.
  • Partner with design and product engineering teams to identify testability requirements and make design-for-test tradeoffs.
  • Architect tester solutions and guide development of Tester HW design.
  • Validate Tester Designs and characterize before implementing into Mass Production.
  • Apply understanding of physical-layer behavior to investigate failures, interpret lab and production data, and resolve complex performance issues.
  • Lead root-cause analysis and yield improvement using protocol analyzers, oscilloscopes, manufacturing data, and structured failure analysis.
  • Serve as a senior technical advisor across test, DFT, design, operations, quality, and external manufacturing organizations.
  • Establish best-known methods, scalable test processes, and automation practices.
  • Mentor engineers, influence technical decisions, and communicate risks and recommendations to stakeholders.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 12–20 years of experience in Test engineering or Product Engineering from development through high-volume manufacturing.
  • Strong experience developing custom test solutions for high-speed, mixed-signal products for high volume manufacturing.
  • Working knowledge of high-speed protocols and physical-layer behavior, including PCIe, Ethernet, DDR, NVMe, or USB.
  • Experience with Test SW development, production debug, and test-time optimization.
  • Proven experience developing and designing custom Test Hardware for PCBA High volume manufacturing.

Preferred qualifications

  • Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.
  • Experience with Electrical HW board design on complex Test HW implementation.
  • Strong knowledge of DFT techniques such as SCAN, MBIST, SerDes, and functional test.
  • Knowledge of control interfaces such as I2C, I3C, SPI, MDIO, and JTAG.
  • Proficiency in C/C++ or Python for ATE programming, data processing, and test automation.
  • Familiarity with databases and yield analytics.
  • Demonstrated ability to provide technical leadership, mentor engineers, and influence cross-functional decisions.
  • Proficient in Mandarin Chinese.

Benefits

  • Base salary range of $205,000 USD - $260,000 USD

Skills

  • PCIe
  • Ethernet
  • DDR
  • NVMe
  • USB
  • SCAN
  • MBIST
  • SerDes
  • I2C
  • I3C
  • SPI
  • MDIO
Show all 15 skills
  • JTAG
  • C/C++
  • Python

Astera Labs

Senior Principal Test Engineer

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