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Signal Integrity Engineer

Pure Storage

Santa Clara · USD 149,999-224,000 / year · Onsite · Posted Oct 20, 2026

At a glance

Workplace
Onsite
Location
Santa Clara
Salary
USD 149,999-224,000 / year · Base salary

About the role

  • The Signal Integrity (SI) Engineer supports the development and validation of high-performance storage platforms to ensure robust electrical performance. This role involves leading electrical modeling, design reviews, lab testing, and issue resolution across the product lifecycle while collaborating with cross-functional hardware and manufacturing teams.

Responsibilities

  • Support SI across hardware products for high-speed interfaces including PCIe Gen5+, 800G Ethernet, and DDR5.
  • Ensure product reliability and maximize performance margins from initial link budgets through production release.
  • Define global design standards by collaborating with PCB layout, hardware, and mechanical teams on stackups, materials, and routing rules.
  • Serve as the SI technical anchor for system-level debug, root-cause analysis, and corrective action implementation.
  • Develop and standardize automated simulation flows and reporting pipelines.
  • Implement Continuous Integration (CI) style checks for model and layout quality.

Requirements

  • Foundational knowledge in high-speed channel design and validation for interfaces like PCIe Gen4+, 25G+ SerDes Ethernet, and DDR4/DDR5.
  • Understanding of electromagnetic concepts, crosstalk mitigation, and jitter analysis.
  • Exposure to industry-standard EDA tools such as HyperLynx, Sigrity, Simbeor, or HFSS.
  • Hands-on lab experience using high-speed instruments including VNA, TDR, BERT, and Oscilloscopes.
  • Experience with scripting or data analysis using Python, MATLAB, or similar tools.
  • Ability to work effectively on a cross-functional team and document technical results.

Benefits

  • Flexible time off
  • Wellness resources
  • Company-sponsored team events
  • Incentive pay
  • Equity

Workplace

  • Primarily an in-office environment.
  • Expected to work from the Santa Clara, CA office.

Skills

  • PCIe Gen5
  • 800G Ethernet
  • DDR5
  • HyperLynx
  • Sigrity
  • Simbeor
  • HFSS
  • VNA
  • TDR
  • BERT
  • Oscilloscopes
  • Python
Show all 15 skills
  • MATLAB
  • IBIS-AMI
  • COM

Pure Storage

Signal Integrity Engineer

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