Staff Engineer,Post-Silicon Validation
Austin · Santa Clara · USD 100,000-500,000 · 5+ years experience · Hybrid · Posted Sep 28, 2026
At a glance
- Experience
- 5+ years experience
- Workplace
- Hybrid
- Location
- Austin · Santa Clara
- Salary
- USD 100,000-500,000 · OTE
About the role
- Tenstorrent is looking for a Staff Engineer for Post-Silicon Validation to drive bring-up, validation, and debug of RISC-V–based SoCs.
- This role sits at the intersection of silicon, firmware, and system software, requiring hands-on lab experience and understanding of SoC architectures.
- The engineer will own post-silicon validation from first-silicon bring-up through production readiness in a hybrid work environment.
Responsibilities
- Lead first-silicon bring-up of RISC-V CPU–based SoCs and execute post-silicon validation plans.
- Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
- Develop and debug bare-metal tests, boot flows, and collaborate on Linux bring-up and driver validation.
- Provide actionable feedback, support ECO validation, and drive fixes for future silicon revisions.
Requirements
- 5+ years of experience in SoC bring-up, validation, and silicon debug.
- Strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems.
- Comfortable debugging complex hardware/software interaction issues using lab tools and low-level software.
- Thrive in cross-functional environments and enjoy working closely with RTL, firmware, and software teams to solve hard problems.
Workplace
- This role is hybrid, based out of Austin TX, or Santa Clara CA.
Skills
- RISC-V
- SoC
- Linux
- RTL
