
Staff PCB Design Engineer/Layout Engineer, Air Dominance and Strike
Costa Mesa · Costa Mesa, CA (OC-00) · USD 168,000-272,000 · 5+ years experience · Posted Sep 25, 2026
At a glance
- Experience
- 5+ years experience
- Location
- Costa Mesa · Costa Mesa, CA (OC-00)
- Salary
- USD 168,000-272,000 · Base salary
About the role
- The Staff PCB Design Engineer/Layout Engineer will work with avionics, system, and software engineers to create test systems for development, qualification, verification, and validation.
- This role supports new developments, active deployments, and customer-operated hardware in a fast-paced environment.
Responsibilities
- Create test systems for development, qualification, verification, and validation purposes.
- Read and interpret schematics and apply best practices for design.
- Push back on schematic or architectural decisions that create layout, manufacturability, or integrity risk.
- Define and validate stackups with fabricators.
- Own ECAD libraries and library standards, including footprint creation, verification, and governance.
- Interpret SI/PI simulation results and translate them into layout constraints.
- Perform high-speed digital layout and controlled impedance routing.
- Manage layout scope, schedule, and risk across concurrent programs.
- Serve as lead designer on complex or multi-board programs.
- Mentor less experienced designers and conduct design reviews.
Requirements
- 10+ years of experience with PCB layout.
- 5+ years of experience with Altium.
- Deep understanding of PCB fabrication and assembly processes, limitations, design rules, and best practices.
- Working knowledge of signal and power integrity principles.
- Expert-level high speed digital layout and controlled impedance routing (DDR, PCIe, SerDes, Ethernet, USB).
- Experience with high density designs including fine-pitch BGA fanout, HDI/microvia construction, and stackups greater than 12 layers.
- Demonstrated technical leadership in complex or multi-board programs.
- Ability to manage layout scope, schedule, and risk across concurrent programs.
- Eligible for security clearance.
Preferred qualifications
- CID+, CID++ and/or PCEA-CPCD certification
- Working experience applying MIL-STD and IPC standards (IPC-2221/2222, IPC-6012 Class 3, IPC-A-610)
- Experience with rigid-flex, RF/mixed-signal, and thermally constrained designs
- Experience designing and analyzing power distribution networks using SI/PI tools (HyperLynx, Ansys SIwave, Cadence Sigrity, or equivalent)
- Advanced Altium proficiency (constraint/rule management, scripting, Altium 365/Concord Pro)
- Experience leading DFM/DFA engagement with fab and assembly vendors through NPI
- Experience introducing or improving ECAD process, design standards, or documentation practices
- Bachelor's degree in electrical engineering or similar
Benefits
- Competitive equity grants
- Comprehensive benefits package
Workplace
- Role is based in Costa Mesa, CA.
Skills
- Altium
- DDR
- PCIe
- SerDes
- Ethernet
- USB
- HyperLynx
- Ansys SIwave
- Cadence Sigrity
- Altium 365
- Concord Pro