Staff Wafer-level Testing Engineer (Operations & Process)

Singapore · 5+ years experience · Full-time · Onsite · Posted Oct 9, 2026

At a glance

At Lumilens, we are building the essential photonics infrastructure that will drive tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is ushering in a new era of computing that is faster, cooler, and dramatically more efficient. We’re a well-funded startup backed by Mayfield and led by veterans who have built and scaled some of the industry’s most transformative technologies.

This is a critical technical role responsible for the operational execution, process control, and continuous improvement of Lumilens’ wafer-level testing operations.
The role involves serving as a key owner of wafer-level test processes, test flow, manufacturing readiness, production performance, yield, and process optimization.
The successful candidate will work closely with internal engineering teams and external manufacturing partners to ensure robust, scalable, and efficient wafer-level testing.

Own and continuously improve wafer-level test processes to ensure stable, repeatable, and efficient production execution.
Lead the setup, qualification, and day-to-day operation of automated wafer probers, optical alignment systems, and Automated Test Equipment (ATE).
Drive day-to-day wafer-level test operations, monitor production performance, and identify process constraints.
Develop, optimize, and qualify wafer-level test processes, including test flows, test conditions, and operating procedures.
Establish and maintain process specifications, control plans, operating windows, and monitoring methodologies.
Monitor wafer-level test yield and defect performance, identify systematic losses, and lead improvement activities.
Analyze wafer-level test data to identify trends, abnormal conditions, process shifts, and systematic failures.
Develop and maintain test process specifications, work instructions, control plans, and qualification reports.
Drive improvements in test cycle time, throughput, yield, process efficiency, and overall manufacturing cost.
Lead structured improvement activities using data-driven methodologies such as DOE, SPC, Six Sigma, and root-cause analysis.

Bachelor’s degree in Electrical Engineering, Electronics Engineering, Microelectronics, Physics, Optical Engineering, Semiconductor Engineering, or a closely related discipline.
Minimum 5 years of experience in semiconductor wafer-level testing, wafer sort, test process engineering, manufacturing operations, or parametric test process engineering.
Strong analytical and problem-solving skills with demonstrated ability to analyze test data and drive corrective actions.
Proven proficiency in data analysis software (e.g., JMP, Spotfire, Python, R) for yield modeling, SPC, and test time reduction.
Strong understanding of wafer-level test processes, test flow development, process control, yield management, and production test methodologies.
Strong cross-functional communication and project management skills.

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