Senior FPGA Verification Engineer
Boulder · Waltham, MA (WMA-01) · USD 165,000-218,000 · 8+ years experience · Full-time · Posted Sep 24, 2026
At a glance
- Experience
- 8+ years experience
- Employment
- Full-time
- Location
- Boulder · Waltham, MA (WMA-01)
- Salary
- USD 165,000-218,000 · Base salary
About the role
- The Imaging team is seeking a Senior FPGA Verification Engineer to help design new product lines.
- In this role, you will work closely with an interdisciplinary technical team to define, design, analyze, and prototype systems leading to ground and flight testing.
Responsibilities
- Verification environment architecture and design using tools like SystemVerilog or OVM/UVM
- Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
- Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
- Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow
- Contribute to engineering estimates for new program pursuits
- Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
Requirements
- Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field
- 8+ years of experience developing HDL firmware for FPGA devices
- Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment
- Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog
- Experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
- Experience using revision control systems such as Git or Subversion
- Eligible to obtain and maintain an active U.S. Secret security clearance
Preferred qualifications
- Experience with ASIC/FPGA lab validation and debug using standard lab equipment
- Familiarity with DFT, manufacturability, and production test concepts
- Proficiency with Unix/Linux environments
- Scripting or software development experience (C, C++, Python, Perl, or shell)
- Experience with industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado
Benefits
- Highly competitive equity grants
- Comprehensive, competitive benefits package
Workplace
- Role is based in Boulder or Waltham, MA (WMA-01)
Skills
- SystemVerilog
- OVM
- UVM
- VHDL
- Verilog
- Git
- Subversion
- Unix
- Linux
- C
- C++
- Python
Show all 15 skills
- Perl
- QuestaSim
- Vivado
