Staff Analog/Mixed Signal Engineer

San Jose · SSI San Jose · USD 163,000-253,000 · 8+ years experience · Full-time · Onsite · Posted Oct 1, 2026

At a glance

Samsung Semiconductor is seeking a Staff Analog/Mixed Signal Engineer to design high-performance PLL and clocking subsystems.
The role focuses on RF transceivers, SerDes, and high-speed I/O applications using advanced deep-submicron CMOS technologies.

Design RF/Analog PLL and clocking circuits using advanced deep-submicron CMOS technologies.
Design Serdes analog PHY circuits using advanced deep-submicron CMOS technologies.
Perform system modeling and analysis for mixed signal systems.
Perform design verification and production support tasks.
Collaborate with digital and software developers to meet system requirements.

Bachelor’s degree with 10+ years of experience, Master's with 8+ years, or PhD with 5 years of experience in a related field.
Hands-on experience in designing frequency synthesizer and clock generation circuits in deep sub-micron CMOS technologies.
Ability to comprehend PLL loop system knowledge to circuit level specifications.
Strong knowledge of IC design CAD tools such as Spectre, SpectreRF, AMS simulator, and Matlab.
Familiarity with Verilog and SystemVerilog programming.
Thorough understanding of physical layout requirements and ability to perform critical layouts.
Lab testing skills to evaluate prototype units to design specifications.
Excellent problem solving, analytical, communication, and presentation skills.